The present invention is a means for communication between a central processing unit (“CPU” or microprocessor) and an input/output control board, for controlling peripheral devices associated with a gaming machine.
Historically, gaming machines have always been monolithic. That is, they have a single Central Processing Unit (CPU) running a single block of software that controlled all the hardware directly. Some hardware devices have a micro-controller in them to perform tasks for an explicit hardware function, but the game CPI to hardware interface is still monolithic in nature. An example of two smart devices that are controlled by the single game CPU are the following: U.S. Pat. No. 5,190,497 (Taxon, and assigned to Bally Manufacturing Corp.) for a high capacity coin hopper (a “super hopper”) for a gaming machine which uses a micro-controller, but still has traditional control lines as if it were a non-intelligent hopper and U.S. Pat. No. 5,420,406 to Izawa et al and assigned to Japan Cash Machines which discloses a bill acceptor, which requires a micro-controller to perform the operation of validating currency, but is interfaced via a dedicated serial port. The software to talk to these hardware devices would, generally, always be included in the software block that runs on the game CPU, whether or not that device was connected to the game. This static approach affects the CPU layout, since the Input/Output (I/O) is included on the CPU board, and it affects the design of the software that runs on the CPU. The resulting method of integrating the software to the hardware on a monolithic (or stand alone) CPU makes the software monolithic, harder to add new interfaces to hardware, and harder to maintain existing software.
If an extra level of intelligence could be added to the hardware devices of the gaming machine, the gaming CPU could dedicate more time running the game software and less time interfacing to the hardware. Using an Input/Output Control Board (IOCB) makes the game CPU a common part, since changes to the attached hardware do not affect the game CPU board. The structure of the Input/Output Control Board and its interactions with the gaming machine's CPU and the peripheral devices associated with the gaming machine are disclosed in Aristocrat's PCT Patent application, No. PCT/AU99/00373 for an Input/Output Control System. As disclosed, the microprocessor of IOCB, in conjunction with the CPU of the gaming machine, controls the operation of the gaming peripherals. Revisions to the gaming software and additional peripheral devices, are controlled using the IOCB. The IOCB thus provides the extra level of intelligence to the gaming machine, provided there are reliable communication between the IOCB and the game CPU.
The present invention describes communications between the game CPU and the IOCG. A factor in establishing reliable communications between the game CPU and the IOCG is having properly abstracted hardware to allow the software on the game CPU to adapt and correspond to new hardware arrangements with fewer changes to the game CPU hardware and software. The present invention further describes the hardware abstraction protocol.
It is an object of the present invention to provide an interface to enable communication between the central processing unit (CPU) of a gaming machine and an input/output control board (IOCB), for controlling peripheral devices associated with the gaming machine.
Another object of the present invention is to provide a communications protocol for hi-directional communication between the CPU of a gaming machine and an input/output control board.
Yet another object of the present invention is to provide a communications protocol that can determine whether the game CPU is in communication with the IOCB before a communication is sent between them.
Still another object of the present invention is to provide a communications protocol that includes a means of identifying the recipient of the communication.
Another object of the present invention is to provide a communications protocol that includes a means of sequentially numbering the transmissions.
Still another object of the present invention is to provide a communications protocol that contains a virtual device message.
Another object of the present invention is to provide a communications protocol that includes a means to validate the communication and verify the integrity of the communication.
Still another object of the present invention is to provide a means to store program codes for the peripheral devices associated with the gaming machine within the input/output control board, the process being referred to as abstraction.
Yet another object of the present invention is to provide a means to store hardware codes for the peripheral devices associated with the gaming machine within memory means of the input/output control board.
Still another object of the present invention is to provide a means to store communication codes for communicating with the peripheral devices associated with the gaming machine within memory means of the input/output control board.
Yet another object of the present invention is to provide a means to store meta-commands for the control of specific hardware devices.